The present invention is in the field of echo cancellers. More specifically, the present invention provides improvements in the performance of an echo canceller with an adaptive transfer filter utilizing pseudo-logarithmic coding, while at the same time reducing the complexity and cost of the canceller.
In long-distance telephone communication networks, four-wire links are utilized over a substantial portion of the transmission path: one of the pairs being dedicated to only transmitting the signal to the destination, and the other pair being dedicated only to receiving the signal sent from the destination. A hybrid coil is used to combine the separate signals on the transmit and receive pairs for a single two-wire circuit.
It is well known that the hybrid coil does not provide echo-free coupling between the send and receive pairs of the four-wire link; a portion of the signal on the receive pair passes to the send pair and appears as an echo signal.
In my prior echo canceller, as disclosed in U.S. Pat. No. 4,064,379, and as shown in FIG. 1 herein, the received signal X(t) is sampled and converted into its absolute value in stage 10, and then further converted into a 7-bit pseudo-logarithmic companding code in a special analog-to-digital converter 12. The entire digitized sample x.sub.i is multiplexed in multiplexer 14, and then stored in a plurality of shift registers forming X-register 16. An average for pseudo-rms value of the x.sub.i samples is computed in stage 18, and the samples are also compared in a comparator 20 with the stored average or pseudo-rms value. An H-register 22 stores N digital words, h.sub.1 through h.sub.n representing the echo path impulse response. When the sample x.sub.i is greater than the average or pseudo-rms value, a control signal .phi.(x) from comparator 20 causes updating of the existing value of the corresponding digital word h.sub.i stored in H-register 22. The average or pseudo-rms value of incoming signal X(t) is also converted in a digital-to-analog converter 24 to a reference voltage X.sub.j used to bias an analog center clipper 26 and to also bias an analog comparator 28. A band pass filter 30, pre-emphasis circuit 32, and a low pass filter with a de-emphasis circuit 34 reduce the harmonic distortion caused by center clipper 26. The sample x.sub.i and corresponding digital word h.sub.i stored in the X-register 16 and H-register 22, respectively, are fed into a multiplier 36 in order that the pseudo-logarithmic encoded x.sub.i and h.sub.i values may be used directly without further conversion. The multiplication is performed in three different ways: when the exponents are both non-zero, addition of the exponents and mantissas in two adders takes place; when the exponents are both zero, the mantissas are directly multiplied; and when only one exponent is non-zero, both mantissas are directly multiplied and added to the mantissa of the number with a zero exponent, and the product is shifted in a shift register according to the value of the exponent. The result of the multiplication is then added to, or subtracted from, the contents of an accumulator 38. The output r.sub.j of the accumulator 38 is converted in a digital-to-analog converter 40 into an analog voltage which is subtracted in a differential amplifier 42 from the echo signal y(t) which is present in the transmit pair of the four-wire circuit.
While my prior echo canceller is superior in performance and lower in cost than conventional digital echo cancellers, if its complexity could be reduced without sacrificing performance, a considerable cost saving could be achieved.